Design Through Verilog HDL (Record no. 100582)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00436nam a2200181Ia 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9812531319 |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | "Padmanabhan, T R" |
| 245 #0 - TITLE STATEMENT | |
| Title | Design Through Verilog HDL |
| 250 ## - EDITION STATEMENT | |
| Edition statement | \\200300ENGGPCX |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | John Wiley |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Name of publisher | 2003 |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Year of publication | New York |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | 458p. |
| 500 ## - GENERAL NOTE | |
| General note | includes index and biblioraphy |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Books |
| Withdrawn status | Lost status | Home library | Current library | Shelving location | Date acquired | Full call number | Accession Number | Koha item type |
|---|---|---|---|---|---|---|---|---|
| PSG-CAS LIBRARY | PSG-CAS LIBRARY | SW ROW 3 RACK 53 SHELF 6 | 26/04/2018 | 621.395 P3 | 110196 | Books |